TI-radar AWR1843 C674x DSP core  1
app_cfg.h
Go to the documentation of this file.
1 
18 #include "device_cfg.h"
19 
20 /* The chirp design for the MRR TI design is as follows.
21  *
22  * The Radar operates in two modes - essentially two subfram-
23  * es per frame, with alternate subframes belonging to one of
24  * the two modes.
25  * 1. A low range-resolution (30cm), high max range (80m),
26  * high max velocity(55kmph), poor angle resolution medium
27  * range radar (MRR) mode - called the MRR80 mode.
28  * 2. A high range-resolution (4.5cm), low max range (20m)
29  * low max velocity (18kmph), high angle resolution ultra
30  * short range (USRR) mode - called the USRR20 mode.
31  *
32  * However the max velocity of 80m is not enough for the MRR
33  * use case, and we need to facilitate algorithmic techniques
34  * to improve it. We will create two kinds of chirp in the
35  * MRR80 mode with have a max unambiguous velocity of 55kmph
36  * and the other having a max unambiguous velocity of
37  * (55/1.2) kmph, and then use the 'chinese remainder
38  * theorem' to estimate the true velocity.
39  *
40  * The MRR80 consists of one profile, two kinds of chirps,
41  * with each chirp being repeated 64 times. These two sets of
42  * chirps are processed seperately. The estimate of velocity
43  * in one set, is compared with the estimate in the other set
44  * to generate the true velocity. Only one tx is active in
45  * this mode. i.e. No MIMO is used in MRR80.
46  *
47  * USRR20 consists of one profile (much higher BW MRR80), two
48  * chirps (in a TDM-MIMO configuration), processed as a conventi-
49  * nal two-tx four-rx capture. Some improvements to the max-
50  * velocity is done so that we can still maintain a reasonable
51  * 36kmph max velocity.
52  *
53  * Since the chirp design of MRR80 and USRR20 are different
54  * two different 'processing paths' are used to process them.
55  *
56  * USRR20 is processed by POINT_CLOUD_PROCESSING path and
57  * MRR80 is processed by the MAX_VEL_ENH_PROCESSING path.
58  *
59  */
60 
61 #ifndef MRR_CONFIG_CONSTS_H
62 #define MRR_CONFIG_CONSTS_H
63 #include <ti/common/sys_common.h>
64 
65 
66 
70 // #define LOW_THRESHOLD_FOR_USRR
74 //#define MRR_RANGE_120m
75 
76 
77 #define NUM_RX_CHANNELS (4U)
78 #define NUM_CHIRP_PROG (3U) /* 3TX antennas so Three for USRR20 */
79 #define NUM_PROFILES (1U) /* one profile for USRR mode of operation*/
80 #define NUM_SUBFRAMES (1U) /* one subframe for USRR mode operation: No advanced frame configuration */
81 
83 #define SUBFRAME_CONF_USRR
84 
85 
86 
88 #define ADCBUFF_CHIRP_THRESHOLD (1U)
89 
91 //#define MAX_VEL_ENH_SUBFRAME_IDX (0U)
92 
93 
95 //#include "profiles/mrr_config_chirp_design_USRR20.h"
98 
99 #ifdef SUBFRAME_CONF_USRR
100  #define FRAME_PERIODICITY_VAL (SUBFRAME_USRR_PERIODICITY_VAL)
101 #endif
102 
103 
105 #define FRAME_PERIODICITY_SEC (FRAME_PERIODICITY_VAL*5e-9)
106 
108 #define MAX_NUM_RANGE_DEPENDANT_SNR_THRESHOLDS (3U)
109 
111 #define MAX_VEL_ENH_PROCESSING (0U)
112 #define POINT_CLOUD_PROCESSING (1U)
113 
115 #define MAX_NUM_CLUSTER_USRR (24U)
116 
118 #define MAX_NUM_CLUSTER_MRR (32U)
119 
121 #define MAX_TRK_OBJs (32U)
122 
124 #define REPORT_N_BIT_FRAC (7U)
125 
127 #define CFARTHRESHOLD_N_BIT_FRAC (8U)
128 
130 #define MIN_RANGE_OFFSET_METERS (0.075f)
131 
133 #define MIN_TICK_FOR_TX (10U)
134 
137 #define SIN_55_DEGREES (0.8192f)
138 
141 #define TRK_SIN_AZIM_THRESH (1.0f/256.0f)
142 
145 #define CHECK_FOR_DET_MATRIX_TX 1
146 #define DO_NOT_CHECK_FOR_DET_MATRIX_TX 0
147 
150 #define MRR_MAX_OBJ_OUT 200
151 
152 
156 #define MAX_DET_OBJECTS_RAW_MAX_VEL_ENH_PROCESSING 200
157 
158 #define MAX_DET_OBJECTS_RAW_POINT_CLOUD_PROCESSING 900
159 
160 #define MAX_VEL_IMPROVEMENT_ASSOCIATION_THRESH_DB (3U)
161 
162 #define MAX_VEL_IMPROVEMENT_ASSOCIATION_THRESH ( (( 1U << CFARTHRESHOLD_N_BIT_FRAC) * NUM_RX_CHANNELS * MAX_VEL_IMPROVEMENT_ASSOCIATION_THRESH_DB) / 6U)
163 
164 #define MAX_VEL_IMPROVEMENT_NUM_SPREAD (2U)
165 
166 #define MAX_VEL_ENH_NUM_NYQUIST (2U)
167 
168 #define MAX_NUM_DET_PER_RANGE_GATE (3U)
169 
170 
172 #define FRAME_CHIRP_START_IDX (0U)
173 #define FRAME_CHIRP_END_IDX (1U)
174 #define FRAME_COUNT_VAL (0U)
175 #define FRAME_LOOP_COUNT (64U)
176 #define FRAME_TRIGGER_DELAY_VAL (0U)
177 #define FRAME_NUM_REAL_ADC_SAMPLES (512U)
178 #define FRAME_NUM_CMPLX_ADC_SAMPLES (256U)
179 
181 #define EDMA_INSTANCE_A (0U)
182 #define EDMA_INSTANCE_B (1U)
183 
184 
187 #define MRR_SF0_EDMA_CH_1D_IN_PING EDMA_TPCC0_REQ_FREE_0
188 #define MRR_SF0_EDMA_CH_1D_IN_PONG EDMA_TPCC0_REQ_FREE_1
189 #define MRR_SF0_EDMA_CH_1D_OUT_PING EDMA_TPCC0_REQ_FREE_2
190 #define MRR_SF0_EDMA_CH_1D_OUT_PONG EDMA_TPCC0_REQ_FREE_3
191 #define MRR_SF0_EDMA_CH_2D_IN_PING EDMA_TPCC0_REQ_FREE_4
192 #define MRR_SF0_EDMA_CH_2D_IN_PONG EDMA_TPCC0_REQ_FREE_5
193 #define MRR_SF0_EDMA_CH_DET_MATRIX EDMA_TPCC0_REQ_FREE_6
194 #define MRR_SF0_EDMA_CH_DET_MATRIX2 EDMA_TPCC0_REQ_FREE_7
195 #define MRR_SF0_EDMA_CH_3D_IN_PING EDMA_TPCC0_REQ_FREE_8
196 #define MRR_SF0_EDMA_CH_3D_IN_PONG EDMA_TPCC0_REQ_FREE_9
197 
198 
199 /* Use the faster EDMA_INSTANCE_A (TPCC0) in the DSS */
200 #define EDMA_INSTANCE_DSS EDMA_INSTANCE_A
201 #define EDMA_INSTANCE_MSS EDMA_INSTANCE_B
202 
203 
204 #define MRR_EDMA_TRIGGER_ENABLE 1
205 #define MRR_EDMA_TRIGGER_DISABLE 0
206 
207 
211 #define MAX_VEL_POINT_CLOUD_PROCESSING_IS_ENABLED 0
212 #endif
config_chirp_design_USRR30.h
device_cfg.h
This file holds constants related to the system chirp configuration as well as the calling the profil...