This file holds constants related to the system chirp configuration as well as the calling the profiles configs such as: config_chirp_design_USRR20.h config_chirp_design_USRR30.h To Add profiles, create the profile in the following path common/profiles/ under the following name convention: config_chirp_design_XRRxx.h X where S:Short, M: Medium, US: Ultrashort .. etc xx is the number of chips within the frame. More...

This graph shows which files directly or indirectly include this file:

Macros
#define	TX_CHANNEL_1_ENABLE (1U << 0U)

#define	TX_CHANNEL_2_ENABLE (1U << 1U)

#define	TX_CHANNEL_3_ENABLE (1U << 2U)

#define	TX_CHANNEL_1_2_ENABLE (TX_CHANNEL_1_ENABLE \| TX_CHANNEL_2_ENABLE)

#define	TX_CHANNEL_2_3_ENABLE (TX_CHANNEL_2_ENABLE \| TX_CHANNEL_3_ENABLE)

#define	TX_CHANNEL_1_3_ENABLE (TX_CHANNEL_1_ENABLE \| TX_CHANNEL_3_ENABLE)

#define	TX_CHANNEL_1_2_3_ENABLE (TX_CHANNEL_1_ENABLE \| TX_CHANNEL_2_ENABLE \| TX_CHANNEL_3_ENABLE)

#define	RX_CHANNEL_1_ENABLE (1U << 0U)

#define	RX_CHANNEL_2_ENABLE (1U << 1U)

#define	RX_CHANNEL_3_ENABLE (1U << 2U)

#define	RX_CHANNEL_4_ENABLE (1U << 3U)

#define	RX_CHANNEL_1_2_ENABLE (RX_CHANNEL_1_ENABLE \| RX_CHANNEL_2_ENABLE)

#define	RX_CHANNEL_1_3_ENABLE (RX_CHANNEL_1_ENABLE \| RX_CHANNEL_3_ENABLE)

#define	RX_CHANNEL_1_4_ENABLE (RX_CHANNEL_1_ENABLE \| RX_CHANNEL_4_ENABLE)

#define	RX_CHANNEL_2_3_ENABLE (RX_CHANNEL_2_ENABLE \| RX_CHANNEL_3_ENABLE)

#define	RX_CHANNEL_2_4_ENABLE (RX_CHANNEL_2_ENABLE \| RX_CHANNEL_4_ENABLE)

#define	RX_CHANNEL_3_4_ENABLE (RX_CHANNEL_3_ENABLE \| RX_CHANNEL_4_ENABLE)

#define	RX_CHANNEL_1_2_3_ENABLE (RX_CHANNEL_1_ENABLE \| RX_CHANNEL_2_ENABLE \| RX_CHANNEL_3_ENABLE)

#define	RX_CHANNEL_2_3_4_ENABLE (RX_CHANNEL_2_ENABLE \| RX_CHANNEL_3_ENABLE \| RX_CHANNEL_4_ENABLE)

#define	RX_CHANNEL_1_3_4_ENABLE (RX_CHANNEL_1_ENABLE \| RX_CHANNEL_3_ENABLE \| RX_CHANNEL_4_ENABLE)

#define	RX_CHANNEL_1_2_3_4_ENABLE (RX_CHANNEL_1_ENABLE \| RX_CHANNEL_2_ENABLE \| RX_CHANNEL_3_ENABLE \| RX_CHANNEL_4_ENABLE)

#define	ADC_BITS_12 (0U)

#define	ADC_BITS_14 (1U)

#define	ADC_BITS_16 (2U)

#define	ADC_FORMAT_REAL (0U)

#define	ADC_FORMAT_COMPLEX (1U)

#define	ADC_FORMAT_CPMLEX_WITH_IMG_BAND (2U)

#define	ADC_I_FIRST (0U)

#define	ADC_Q_FIRST (1U)

#define	ADC_INTERLEAVED_MODE (0U)

#define	ADC_NON_INTERLEAVED_MODE (1U)

#define	DATA_PATH_CSI2 (0U)

#define	DATA_PATH_LVDS (1U)

#define	DATA_PATH_FMT1_SUPRESS (0U)

#define	DATA_PATH_FMT1_CP_CQ (1U)

#define	DATA_PATH_FMT1_CQ_CP (2U)

#define	DATA_PATH_FMT0_ADC_DATA_ONLY (0U)

#define	DATA_PATH_FMT0_CP_ADC_DATA (1U)

#define	DATA_PATH_FMT0_ADC_CP_DATA (2U)

#define	DATA_PATH_FMT0_CP_ADC_CQ_DATA (3U)

#define	DATA_PATH_CQ_FMT_BITS_12 (0U)

#define	DATA_PATH_CQ_FMT_BITS_14 (1U)

#define	DATA_PATH_CQ_FMT_BITS_16 (2U)

#define	LVDS_LANE_CLOCK_SDR (0U)

#define	LVDS_LANE_CLOCK_DDR (1U)

#define	LVDS_ALL_LANE_EN (0xFU)

#define	LVDS_DATA_RATE_900 (0U)

#define	LVDS_DATA_RATE_600 (1U)

#define	LVDS_DATA_RATE_450 (2U)

#define	LVDS_DATA_RATE_400 (3U)

#define	LVDS_DATA_RATE_300 (4U)

#define	LVDS_DATA_RATE_225 (5U)

#define	LVDS_DATA_RATE_150 (6U)

#define	LVDS_LANE1_DISABLE (0U)

#define	LVDS_LANE1_FORMAT_0 (1U)

#define	LVDS_LANE1_FORMAT_1 (2U)

#define	LVDS_LANE2_DISABLE (0U)

#define	LVDS_LANE2_FORMAT_0 (1U)

#define	LVDS_LANE2_FORMAT_1 (2U)

#define	LVDS_LANE3_DISABLE (0U)

#define	LVDS_LANE3_FORMAT_0 (1U)

#define	LVDS_LANE3_FORMAT_1 (2U)

#define	LVDS_LANE4_DISABLE (0U)

#define	LVDS_LANE4_FORMAT_0 (1U)

#define	LVDS_LANE4_FORMAT_1 (2U)

#define	LVDS_LANE_MSB_FIRST_ENABLE (1U)

#define	LVDS_LANE_MSB_FIRST_DISABLE (0U)

#define	LVDS_LANE_PACKET_END_PULSE_ENABLE (1U)

#define	LVDS_LANE_PACKET_END_PULSE_DISABLE (0U)

#define	LVDS_LANE_CRC_ENABLE (1U)

#define	LVDS_LANE_CRC_DISABLE (0U)

#define	LVDS_LANE_TI_MODE_ENABLE (1U)

#define	LVDS_LANE_TI_MODE_DISABLE (0U)

#define	ANA_CHANNEL_COMPLEX_CHAIN (0U)

#define	ANA_CHANNEL_REAL_CHAIN (1U)

#define	LP_ADC_MODE_REGULAR (0U)

#define	LP_ADC_MODE_LOW_POWER (1U)

#define	NOISE_FIGURE_LOW (0U)

#define	NOISE_FIGURE_HIGH (1U)

#define	CHIRP_HPF1_CORNER_FREQ_175K (0U)

#define	CHIRP_HPF1_CORNER_FREQ_235K (1U)

#define	CHIRP_HPF1_CORNER_FREQ_350K (2U)

#define	CHIRP_HPF1_CORNER_FREQ_700K (3U)

#define	CHIRP_HPF2_CORNER_FREQ_350K (0U)

#define	CHIRP_HPF2_CORNER_FREQ_700K (1U)

#define	CHIRP_HPF2_CORNER_FREQ_1_4M (2U)

#define	CHIRP_HPF2_CORNER_FREQ_2_8M (3U)

#define	CHIRP_HPF2_CORNER_FREQ_5M (4U)

#define	CHIRP_HPF2_CORNER_FREQ_7_5M (5U)

#define	CHIRP_HPF2_CORNER_FREQ_10M (6U)

#define	CHIRP_HPF2_CORNER_FREQ_15M (7U)

#define	ROUND_TO_INT32(X) ((int32_t) (X))

#define	CONV_FREQ_GHZ_TO_CODEWORD(X) ROUND_TO_INT32(X * (1.0e9/53.644))

#define	CONV_SLOPE_MHZ_PER_US_TO_CODEWORD(X) (ROUND_TO_INT32(X * (1000.0/48.279)))

#define	LOG2_APPROX(X) ((X <= 1)? 0:((X <= 2)? 1:((X <= 4)? 2:((X <= 8)? 3:((X <= 16)? 4:((X <= 32)? 5:((X <= 64)? 6:((X <= 128)? 7:((X <= 256)? 8:((X <= 512)? 9:((X <= 1024)? 10:11)))))))))))

#define	SPEED_OF_LIGHT_IN_METERS_PER_SEC (3.0e8)

#define	SPEED_OF_LIGHT_IN_METERS_PER_USEC (3.0e2)

Detailed Description

This file holds constants related to the system chirp configuration as well as the calling the profiles configs such as: config_chirp_design_USRR20.h config_chirp_design_USRR30.h To Add profiles, create the profile in the following path common/profiles/ under the following name convention: config_chirp_design_XRRxx.h X where S:Short, M: Medium, US: Ultrashort .. etc xx is the number of chips within the frame.

Definition in file device_cfg.h.

Macro Definition Documentation

◆ ADC_BITS_12

#define ADC_BITS_12 (0U)

Definition at line 31 of file device_cfg.h.

◆ ADC_BITS_14

#define ADC_BITS_14 (1U)

Definition at line 32 of file device_cfg.h.

◆ ADC_BITS_16

#define ADC_BITS_16 (2U)

Definition at line 33 of file device_cfg.h.

◆ ADC_FORMAT_COMPLEX

#define ADC_FORMAT_COMPLEX (1U)

Definition at line 36 of file device_cfg.h.

◆ ADC_FORMAT_CPMLEX_WITH_IMG_BAND

#define ADC_FORMAT_CPMLEX_WITH_IMG_BAND (2U)

Definition at line 37 of file device_cfg.h.

◆ ADC_FORMAT_REAL

#define ADC_FORMAT_REAL (0U)

Definition at line 35 of file device_cfg.h.

◆ ADC_I_FIRST

#define ADC_I_FIRST (0U)

Definition at line 39 of file device_cfg.h.

◆ ADC_INTERLEAVED_MODE

#define ADC_INTERLEAVED_MODE (0U)

Definition at line 42 of file device_cfg.h.

◆ ADC_NON_INTERLEAVED_MODE

#define ADC_NON_INTERLEAVED_MODE (1U)

Definition at line 43 of file device_cfg.h.

◆ ADC_Q_FIRST

#define ADC_Q_FIRST (1U)

Definition at line 40 of file device_cfg.h.

◆ ANA_CHANNEL_COMPLEX_CHAIN

#define ANA_CHANNEL_COMPLEX_CHAIN (0U)

Definition at line 104 of file device_cfg.h.

◆ ANA_CHANNEL_REAL_CHAIN

#define ANA_CHANNEL_REAL_CHAIN (1U)

Definition at line 105 of file device_cfg.h.

◆ CHIRP_HPF1_CORNER_FREQ_175K

#define CHIRP_HPF1_CORNER_FREQ_175K (0U)

Definition at line 114 of file device_cfg.h.

◆ CHIRP_HPF1_CORNER_FREQ_235K

#define CHIRP_HPF1_CORNER_FREQ_235K (1U)

Definition at line 115 of file device_cfg.h.

◆ CHIRP_HPF1_CORNER_FREQ_350K

#define CHIRP_HPF1_CORNER_FREQ_350K (2U)

Definition at line 116 of file device_cfg.h.

◆ CHIRP_HPF1_CORNER_FREQ_700K

#define CHIRP_HPF1_CORNER_FREQ_700K (3U)

Definition at line 117 of file device_cfg.h.

◆ CHIRP_HPF2_CORNER_FREQ_10M

#define CHIRP_HPF2_CORNER_FREQ_10M (6U)

Definition at line 125 of file device_cfg.h.

◆ CHIRP_HPF2_CORNER_FREQ_15M

#define CHIRP_HPF2_CORNER_FREQ_15M (7U)

Definition at line 126 of file device_cfg.h.

◆ CHIRP_HPF2_CORNER_FREQ_1_4M

#define CHIRP_HPF2_CORNER_FREQ_1_4M (2U)

Definition at line 121 of file device_cfg.h.

◆ CHIRP_HPF2_CORNER_FREQ_2_8M

#define CHIRP_HPF2_CORNER_FREQ_2_8M (3U)

Definition at line 122 of file device_cfg.h.

◆ CHIRP_HPF2_CORNER_FREQ_350K

#define CHIRP_HPF2_CORNER_FREQ_350K (0U)

Definition at line 119 of file device_cfg.h.

◆ CHIRP_HPF2_CORNER_FREQ_5M

#define CHIRP_HPF2_CORNER_FREQ_5M (4U)

Definition at line 123 of file device_cfg.h.

◆ CHIRP_HPF2_CORNER_FREQ_700K

#define CHIRP_HPF2_CORNER_FREQ_700K (1U)

Definition at line 120 of file device_cfg.h.

◆ CHIRP_HPF2_CORNER_FREQ_7_5M

#define CHIRP_HPF2_CORNER_FREQ_7_5M (5U)

Definition at line 124 of file device_cfg.h.

◆ CONV_FREQ_GHZ_TO_CODEWORD

#define CONV_FREQ_GHZ_TO_CODEWORD ( X ) ROUND_TO_INT32(X * (1.0e9/53.644))

Definition at line 130 of file device_cfg.h.

◆ CONV_SLOPE_MHZ_PER_US_TO_CODEWORD

#define CONV_SLOPE_MHZ_PER_US_TO_CODEWORD ( X ) (ROUND_TO_INT32(X * (1000.0/48.279)))

Definition at line 131 of file device_cfg.h.

◆ DATA_PATH_CQ_FMT_BITS_12

#define DATA_PATH_CQ_FMT_BITS_12 (0U)

Definition at line 59 of file device_cfg.h.

◆ DATA_PATH_CQ_FMT_BITS_14

#define DATA_PATH_CQ_FMT_BITS_14 (1U)

Definition at line 60 of file device_cfg.h.

◆ DATA_PATH_CQ_FMT_BITS_16

#define DATA_PATH_CQ_FMT_BITS_16 (2U)

Definition at line 61 of file device_cfg.h.

◆ DATA_PATH_CSI2

#define DATA_PATH_CSI2 (0U)

Definition at line 46 of file device_cfg.h.

◆ DATA_PATH_FMT0_ADC_CP_DATA

#define DATA_PATH_FMT0_ADC_CP_DATA (2U)

Definition at line 56 of file device_cfg.h.

◆ DATA_PATH_FMT0_ADC_DATA_ONLY

#define DATA_PATH_FMT0_ADC_DATA_ONLY (0U)

Definition at line 54 of file device_cfg.h.

◆ DATA_PATH_FMT0_CP_ADC_CQ_DATA

#define DATA_PATH_FMT0_CP_ADC_CQ_DATA (3U)

Definition at line 57 of file device_cfg.h.

◆ DATA_PATH_FMT0_CP_ADC_DATA

#define DATA_PATH_FMT0_CP_ADC_DATA (1U)

Definition at line 55 of file device_cfg.h.

◆ DATA_PATH_FMT1_CP_CQ

#define DATA_PATH_FMT1_CP_CQ (1U)

Definition at line 51 of file device_cfg.h.

◆ DATA_PATH_FMT1_CQ_CP

#define DATA_PATH_FMT1_CQ_CP (2U)

Definition at line 52 of file device_cfg.h.

◆ DATA_PATH_FMT1_SUPRESS

#define DATA_PATH_FMT1_SUPRESS (0U)

Definition at line 50 of file device_cfg.h.

◆ DATA_PATH_LVDS

#define DATA_PATH_LVDS (1U)

Definition at line 47 of file device_cfg.h.

◆ LOG2_APPROX

#define LOG2_APPROX ( X ) ((X <= 1)? 0:((X <= 2)? 1:((X <= 4)? 2:((X <= 8)? 3:((X <= 16)? 4:((X <= 32)? 5:((X <= 64)? 6:((X <= 128)? 7:((X <= 256)? 8:((X <= 512)? 9:((X <= 1024)? 10:11)))))))))))

Definition at line 133 of file device_cfg.h.

◆ LP_ADC_MODE_LOW_POWER

#define LP_ADC_MODE_LOW_POWER (1U)

Definition at line 108 of file device_cfg.h.

◆ LP_ADC_MODE_REGULAR

#define LP_ADC_MODE_REGULAR (0U)

Definition at line 107 of file device_cfg.h.

◆ LVDS_ALL_LANE_EN

#define LVDS_ALL_LANE_EN (0xFU)

Definition at line 67 of file device_cfg.h.

◆ LVDS_DATA_RATE_150

#define LVDS_DATA_RATE_150 (6U)

Definition at line 75 of file device_cfg.h.

◆ LVDS_DATA_RATE_225

#define LVDS_DATA_RATE_225 (5U)

Definition at line 74 of file device_cfg.h.

◆ LVDS_DATA_RATE_300

#define LVDS_DATA_RATE_300 (4U)

Definition at line 73 of file device_cfg.h.

◆ LVDS_DATA_RATE_400

#define LVDS_DATA_RATE_400 (3U)

Definition at line 72 of file device_cfg.h.

◆ LVDS_DATA_RATE_450

#define LVDS_DATA_RATE_450 (2U)

Definition at line 71 of file device_cfg.h.

◆ LVDS_DATA_RATE_600

#define LVDS_DATA_RATE_600 (1U)

Definition at line 70 of file device_cfg.h.

◆ LVDS_DATA_RATE_900

#define LVDS_DATA_RATE_900 (0U)

Definition at line 69 of file device_cfg.h.

◆ LVDS_LANE1_DISABLE

#define LVDS_LANE1_DISABLE (0U)

Definition at line 78 of file device_cfg.h.

◆ LVDS_LANE1_FORMAT_0

#define LVDS_LANE1_FORMAT_0 (1U)

Definition at line 79 of file device_cfg.h.

◆ LVDS_LANE1_FORMAT_1

#define LVDS_LANE1_FORMAT_1 (2U)

Definition at line 80 of file device_cfg.h.

◆ LVDS_LANE2_DISABLE

#define LVDS_LANE2_DISABLE (0U)

Definition at line 82 of file device_cfg.h.

◆ LVDS_LANE2_FORMAT_0

#define LVDS_LANE2_FORMAT_0 (1U)

Definition at line 83 of file device_cfg.h.

◆ LVDS_LANE2_FORMAT_1

#define LVDS_LANE2_FORMAT_1 (2U)

Definition at line 84 of file device_cfg.h.

◆ LVDS_LANE3_DISABLE

#define LVDS_LANE3_DISABLE (0U)

Definition at line 86 of file device_cfg.h.

◆ LVDS_LANE3_FORMAT_0

#define LVDS_LANE3_FORMAT_0 (1U)

Definition at line 87 of file device_cfg.h.

◆ LVDS_LANE3_FORMAT_1

#define LVDS_LANE3_FORMAT_1 (2U)

Definition at line 88 of file device_cfg.h.

◆ LVDS_LANE4_DISABLE

#define LVDS_LANE4_DISABLE (0U)

Definition at line 90 of file device_cfg.h.

◆ LVDS_LANE4_FORMAT_0

#define LVDS_LANE4_FORMAT_0 (1U)

Definition at line 91 of file device_cfg.h.

◆ LVDS_LANE4_FORMAT_1

#define LVDS_LANE4_FORMAT_1 (2U)

Definition at line 92 of file device_cfg.h.

◆ LVDS_LANE_CLOCK_DDR

#define LVDS_LANE_CLOCK_DDR (1U)

Definition at line 65 of file device_cfg.h.

◆ LVDS_LANE_CLOCK_SDR

#define LVDS_LANE_CLOCK_SDR (0U)

Definition at line 64 of file device_cfg.h.

◆ LVDS_LANE_CRC_DISABLE

#define LVDS_LANE_CRC_DISABLE (0U)

Definition at line 99 of file device_cfg.h.

◆ LVDS_LANE_CRC_ENABLE

#define LVDS_LANE_CRC_ENABLE (1U)

Definition at line 98 of file device_cfg.h.

◆ LVDS_LANE_MSB_FIRST_DISABLE

#define LVDS_LANE_MSB_FIRST_DISABLE (0U)

Definition at line 95 of file device_cfg.h.

◆ LVDS_LANE_MSB_FIRST_ENABLE

#define LVDS_LANE_MSB_FIRST_ENABLE (1U)

Definition at line 94 of file device_cfg.h.

◆ LVDS_LANE_PACKET_END_PULSE_DISABLE

#define LVDS_LANE_PACKET_END_PULSE_DISABLE (0U)

Definition at line 97 of file device_cfg.h.

◆ LVDS_LANE_PACKET_END_PULSE_ENABLE

#define LVDS_LANE_PACKET_END_PULSE_ENABLE (1U)

Definition at line 96 of file device_cfg.h.

◆ LVDS_LANE_TI_MODE_DISABLE

#define LVDS_LANE_TI_MODE_DISABLE (0U)

Definition at line 101 of file device_cfg.h.

◆ LVDS_LANE_TI_MODE_ENABLE

#define LVDS_LANE_TI_MODE_ENABLE (1U)

Definition at line 100 of file device_cfg.h.

◆ NOISE_FIGURE_HIGH

#define NOISE_FIGURE_HIGH (1U)

Definition at line 111 of file device_cfg.h.

◆ NOISE_FIGURE_LOW

#define NOISE_FIGURE_LOW (0U)

Definition at line 110 of file device_cfg.h.

◆ ROUND_TO_INT32

#define ROUND_TO_INT32 ( X ) ((int32_t) (X))

Definition at line 129 of file device_cfg.h.

◆ RX_CHANNEL_1_2_3_4_ENABLE

#define RX_CHANNEL_1_2_3_4_ENABLE (RX_CHANNEL_1_ENABLE | RX_CHANNEL_2_ENABLE | RX_CHANNEL_3_ENABLE | RX_CHANNEL_4_ENABLE)

Definition at line 28 of file device_cfg.h.

◆ RX_CHANNEL_1_2_3_ENABLE

#define RX_CHANNEL_1_2_3_ENABLE (RX_CHANNEL_1_ENABLE | RX_CHANNEL_2_ENABLE | RX_CHANNEL_3_ENABLE)

Definition at line 25 of file device_cfg.h.

◆ RX_CHANNEL_1_2_ENABLE

#define RX_CHANNEL_1_2_ENABLE (RX_CHANNEL_1_ENABLE | RX_CHANNEL_2_ENABLE)

Definition at line 19 of file device_cfg.h.

◆ RX_CHANNEL_1_3_4_ENABLE

#define RX_CHANNEL_1_3_4_ENABLE (RX_CHANNEL_1_ENABLE | RX_CHANNEL_3_ENABLE | RX_CHANNEL_4_ENABLE)

Definition at line 27 of file device_cfg.h.

◆ RX_CHANNEL_1_3_ENABLE

#define RX_CHANNEL_1_3_ENABLE (RX_CHANNEL_1_ENABLE | RX_CHANNEL_3_ENABLE)

Definition at line 20 of file device_cfg.h.

◆ RX_CHANNEL_1_4_ENABLE

#define RX_CHANNEL_1_4_ENABLE (RX_CHANNEL_1_ENABLE | RX_CHANNEL_4_ENABLE)

Definition at line 21 of file device_cfg.h.

◆ RX_CHANNEL_1_ENABLE

#define RX_CHANNEL_1_ENABLE (1U << 0U)

Definition at line 15 of file device_cfg.h.

◆ RX_CHANNEL_2_3_4_ENABLE

#define RX_CHANNEL_2_3_4_ENABLE (RX_CHANNEL_2_ENABLE | RX_CHANNEL_3_ENABLE | RX_CHANNEL_4_ENABLE)

Definition at line 26 of file device_cfg.h.

◆ RX_CHANNEL_2_3_ENABLE

#define RX_CHANNEL_2_3_ENABLE (RX_CHANNEL_2_ENABLE | RX_CHANNEL_3_ENABLE)

Definition at line 22 of file device_cfg.h.

◆ RX_CHANNEL_2_4_ENABLE

#define RX_CHANNEL_2_4_ENABLE (RX_CHANNEL_2_ENABLE | RX_CHANNEL_4_ENABLE)

Definition at line 23 of file device_cfg.h.

◆ RX_CHANNEL_2_ENABLE

#define RX_CHANNEL_2_ENABLE (1U << 1U)

Definition at line 16 of file device_cfg.h.

◆ RX_CHANNEL_3_4_ENABLE

#define RX_CHANNEL_3_4_ENABLE (RX_CHANNEL_3_ENABLE | RX_CHANNEL_4_ENABLE)

Definition at line 24 of file device_cfg.h.

◆ RX_CHANNEL_3_ENABLE

#define RX_CHANNEL_3_ENABLE (1U << 2U)

Definition at line 17 of file device_cfg.h.

◆ RX_CHANNEL_4_ENABLE

#define RX_CHANNEL_4_ENABLE (1U << 3U)

Definition at line 18 of file device_cfg.h.

◆ SPEED_OF_LIGHT_IN_METERS_PER_SEC

#define SPEED_OF_LIGHT_IN_METERS_PER_SEC (3.0e8)

Definition at line 135 of file device_cfg.h.

◆ SPEED_OF_LIGHT_IN_METERS_PER_USEC

#define SPEED_OF_LIGHT_IN_METERS_PER_USEC (3.0e2)

Definition at line 137 of file device_cfg.h.

◆ TX_CHANNEL_1_2_3_ENABLE

#define TX_CHANNEL_1_2_3_ENABLE (TX_CHANNEL_1_ENABLE | TX_CHANNEL_2_ENABLE | TX_CHANNEL_3_ENABLE)

Definition at line 12 of file device_cfg.h.

◆ TX_CHANNEL_1_2_ENABLE

#define TX_CHANNEL_1_2_ENABLE (TX_CHANNEL_1_ENABLE | TX_CHANNEL_2_ENABLE)

Definition at line 9 of file device_cfg.h.

◆ TX_CHANNEL_1_3_ENABLE

#define TX_CHANNEL_1_3_ENABLE (TX_CHANNEL_1_ENABLE | TX_CHANNEL_3_ENABLE)

Definition at line 11 of file device_cfg.h.

◆ TX_CHANNEL_1_ENABLE

#define TX_CHANNEL_1_ENABLE (1U << 0U)

Definition at line 6 of file device_cfg.h.

◆ TX_CHANNEL_2_3_ENABLE

#define TX_CHANNEL_2_3_ENABLE (TX_CHANNEL_2_ENABLE | TX_CHANNEL_3_ENABLE)

Definition at line 10 of file device_cfg.h.

◆ TX_CHANNEL_2_ENABLE

#define TX_CHANNEL_2_ENABLE (1U << 1U)

Definition at line 7 of file device_cfg.h.

◆ TX_CHANNEL_3_ENABLE

#define TX_CHANNEL_3_ENABLE (1U << 2U)

Definition at line 8 of file device_cfg.h.

Macros