This file contains the function prototypes for the device abstraction layer for EDMA. More...

#include <ti/drivers/edma/include/hw_edma_tc.h>
#include <ti/drivers/edma/include/hw_edma_tpcc.h>

Data Structures
struct	EDMA3CCPaRAMEntry
	EDMA3 Parameter RAM Set in User Configurable format. More...

Macros
#define	EDMA3_CHANNEL_TYPE_DMA ((uint32_t) 0U)
	DMA channel type.

#define	EDMA3_CHANNEL_TYPE_QDMA ((uint32_t) 1U)
	QDMA channel type.

#define	EDMA3_SYNC_A ((uint32_t) 0U)
	Transfer Type "A".

#define	EDMA3_SYNC_AB ((uint32_t) 1U)
	Transfer Type "AB".

#define	EDMA3_ADDRESSING_MODE_LINEAR ((uint32_t) 0U)
	Incremental addressing (INCR), not FIFO.

#define	EDMA3_ADDRESSING_MODE_FIFO_WRAP ((uint32_t) 1U)
	Constant addressing (CONST) within the FIFO array, wraps around upon reaching FIFO width.

#define	EDMA3_FIFO_WIDTH_8BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH8BIT)
	8-bit FIFO width

#define	EDMA3_FIFO_WIDTH_16BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH16BIT)
	16-bit FIFO width

#define	EDMA3_FIFO_WIDTH_32BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH32BIT)
	32-bit FIFO width

#define	EDMA3_FIFO_WIDTH_64BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH64BIT)
	64-bit FIFO width

#define	EDMA3_FIFO_WIDTH_128BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH128BIT)
	128-bit FIFO width

#define	EDMA3_FIFO_WIDTH_256BIT ((uint32_t) DMA_TPCC_OPT_FWID_FIFOWIDTH256BIT)
	256-bit FIFO width

Functions
void	EDMA3Init (uint32_t baseAddr, uint32_t queNum)
	EDMA3 Initialization. More...

void	EDMAsetRegion (uint32_t i)
	This API sets the region. More...

void	EDMA3EnableChInShadowReg (uint32_t baseAddr, uint32_t chType, uint32_t chNum)
	Enable channel to Shadow region mapping. More...

void	EDMA3DisableChInShadowReg (uint32_t baseAddr, uint32_t chType, uint32_t chNum)
	Disable channel to Shadow region mapping. More...

void	EDMA3ChannelToParamMap (uint32_t baseAddr, uint32_t channel, uint32_t paramSet)
	This function maps DMA channel to any of the PaRAM sets in the PaRAM memory map. More...

void	EDMA3MapChToEvtQ (uint32_t baseAddr, uint32_t chType, uint32_t chNum, uint32_t evtQNum)
	Map channel to Event Queue. More...

void	EDMA3UnmapChToEvtQ (uint32_t baseAddr, uint32_t chType, uint32_t chNum)
	Remove Mapping of channel to Event Queue. More...

void	EDMA3MapQdmaChToPaRAM (uint32_t baseAddr, uint32_t chNum, const uint32_t *paRAMId)
	Enables the user to map a QDMA channel to PaRAM set This API Needs to be called before programming the paRAM sets for the QDMA Channels.Application needs to maitain the paRAMId provided by this API.This paRAMId is used to set paRAM and get paRAM. Refer corresponding API's for more details. More...

void	EDMA3SetQdmaTrigWord (uint32_t baseAddr, uint32_t chNum, uint32_t trigWord)
	Assign a Trigger Word to the specified QDMA channel. More...

void	EDMA3ClrMissEvt (uint32_t baseAddr, uint32_t chNum)
	Enables the user to Clear any missed event. More...

void	EDMA3QdmaClrMissEvt (uint32_t baseAddr, uint32_t chNum)
	Enables the user to Clear any QDMA missed event. More...

void	EDMA3ClrCCErr (uint32_t baseAddr, uint32_t flags)
	Enables the user to Clear any Channel controller Errors. More...

void	EDMA3SetEvt (uint32_t baseAddr, uint32_t chNum)
	Enables the user to Set an event. This API helps user to manually set events to initiate DMA transfer requests. More...

void	EDMA3ClrEvt (uint32_t baseAddr, uint32_t chNum)
	Enables the user to Clear an event. More...

void	EDMA3EnableDmaEvt (uint32_t baseAddr, uint32_t chNum)
	Enables the user to enable an DMA event. More...

void	EDMA3DisableDmaEvt (uint32_t baseAddr, uint32_t chNum)
	Enables the user to Disable an DMA event. More...

void	EDMA3EnableQdmaEvt (uint32_t baseAddr, uint32_t chNum)
	Enables the user to enable an QDMA event. More...

void	EDMA3DisableQdmaEvt (uint32_t baseAddr, uint32_t chNum)
	Enables the user to disable an QDMA event. More...

uint32_t	EDMA3GetIntrStatus (uint32_t baseAddr)
	This function returns interrupts status of those events which is less than 32. More...

void	EDMA3EnableEvtIntr (uint32_t baseAddr, uint32_t chNum)
	Enables the user to enable the transfer completion interrupt generation by the EDMA3CC for all DMA/QDMA channels. More...

void	EDMA3DisableEvtIntr (uint32_t baseAddr, uint32_t chNum)
	Enables the user to clear CC interrupts. More...

void	EDMA3ClrIntr (uint32_t baseAddr, uint32_t value)
	Enables the user to Clear an Interrupt. More...

void	EDMA3GetPaRAM (uint32_t baseAddr, uint32_t paRAMId, EDMA3CCPaRAMEntry *currPaRAM)
	Retrieve existing PaRAM set associated with specified logical channel (DMA/Link). More...

void	EDMA3QdmaGetPaRAM (uint32_t baseAddr, uint32_t paRAMId, EDMA3CCPaRAMEntry *currPaRAM)
	Retrieve existing PaRAM set associated with specified logical channel (QDMA). More...

void	EDMA3SetPaRAM (uint32_t baseAddr, uint32_t paRAMId, EDMA3CCPaRAMEntry *newPaRAM)
	Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (DMA/Link). More...

void	EDMA3QdmaSetPaRAM (uint32_t baseAddr, uint32_t paRAMId, EDMA3CCPaRAMEntry *newPaRAM)
	Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (QDMA only). More...

void	EDMA3QdmaSetPaRAMEntry (uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry, uint32_t newPaRAMEntryVal)
	Set a particular PaRAM set entry of the specified PaRAM set. More...

uint32_t	EDMA3QdmaGetPaRAMEntry (uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry)
	Get a particular PaRAM entry of the specified PaRAM set. More...

uint32_t	EDMA3RequestChannel (uint32_t baseAddr, uint32_t chType, uint32_t chNum, uint32_t tccNum, uint32_t evtQNum)
	Request a DMA/QDMA/Link channel. More...

uint32_t	EDMA3FreeChannel (uint32_t baseAddr, uint32_t chType, uint32_t chNum, uint32_t trigMode, uint32_t tccNum, uint32_t evtQNum)
	Free the specified channel (DMA/QDMA/Link) and its associated resources (PaRAM Set, TCC etc) and removes various mappings. More...

uint32_t	EDMA3EnableTransfer (uint32_t baseAddr, uint32_t chNum, uint32_t trigMode)
	Start EDMA transfer on the specified channel. More...

uint32_t	EDMA3DisableTransfer (uint32_t baseAddr, uint32_t chNum, uint32_t trigMode)
	Disable DMA transfer on the specified channel. More...

void	EDMA3ClearErrorBits (uint32_t baseAddr, uint32_t chNum, uint32_t evtQNum)
	Clears Event Register and Error Register for a specific DMA channel and brings back EDMA3 to its initial state. More...

uint32_t	EDMA3GetCCErrStatus (uint32_t baseAddr)
	This returns EDMA3 CC error status. More...

uint32_t	EDMA3GetErrIntrStatus (uint32_t baseAddr)
	This returns error interrupt status for those events whose event number is less than 32. More...

uint32_t	EDMA3QdmaGetErrIntrStatus (uint32_t baseAddr)
	This returns QDMA error interrupt status. More...

void	EDMA3Deinit (uint32_t baseAddr, uint32_t queNum)
	EDMA3 Deinitialization. More...

uint32_t	EDMAVersionGet (void)

uint32_t	EDMA3PeripheralIdGet (uint32_t baseAddr)
	This API return the revision Id of the peripheral. More...

uint32_t	EDMA3IntrStatusHighGet (uint32_t baseAddr)
	This function returns interrupts status of those events which is greater than 32. More...

uint32_t	EDMA3ErrIntrHighStatusGet (uint32_t baseAddr)
	This returns error interrupt status for those events whose event number is greater than 32. More...

void	EDMA3ChainChannel (uint32_t baseAddr, uint32_t chId1, uint32_t chId2, uint32_t chainOptions)
	Chain the two specified channels. More...

void	EDMA3LinkChannel (uint32_t baseAddr, uint32_t paRAMId1, uint32_t paRAMId2)
	Link two channels. More...

Detailed Description

This file contains the function prototypes for the device abstraction layer for EDMA.

Please find the below detailed description of edma dal.

Programming sequence for initializing the edma controller
1. Perform the clock configuration of channel controller and transfer controllers.
2. To perform initialization of controller use
  1. EDMA3Init for single CPU interface system.
  2. EDMAsetRegion for multi CPU interface system.
Programming sequence for setting up edma channel.
1. To configure the PaRAM sets use EDMA3SetPaRAM. For custom use
2. To start transfer use EDMA3EnableTransfer.
3. To stop transfer use EDMA3DisableTransfer.

Function Documentation

void EDMA3ChainChannel	(	uint32_t	baseAddr,
		uint32_t	chId1,
		uint32_t	chId2,
		uint32_t	chainOptions
	)

Chain the two specified channels.

This API is used to chain a DMA channel to a previously allocated DMA/QDMA channel

Chaining is different from Linking. The EDMA3 link feature reloads the current channel parameter set with the linked parameter set. The EDMA3 chaining feature does not modify or update any channel parameter set; it provides a synchronization event (or trigger) to the chained DMA channel, as soon as the transfer (final or intermediate) completes on the main DMA/QDMA channel.

Parameters

baseAddr	Memory address of the EDMA instance used.
chId1	DMA/QDMA channel to which a particular DMA channel will be chained
chId2	DMA channel which needs to be chained to the first DMA/QDMA channel.
chainOptions	Options such as intermediate interrupts are required or not, intermediate/final chaining is enabled or not etc.

Returns: none.

void EDMA3ChannelToParamMap	(	uint32_t	baseAddr,
		uint32_t	channel,
		uint32_t	paramSet
	)

This function maps DMA channel to any of the PaRAM sets in the PaRAM memory map.

Parameters

baseAddr	Memory address of the EDMA instance used.
channel	The DMA channel number required to be mapped.
paramSet	It specifies the paramSet to which DMA channel required to be mapped.

Returns: None

void EDMA3ClearErrorBits	(	uint32_t	baseAddr,
		uint32_t	chNum,
		uint32_t	evtQNum
	)

Clears Event Register and Error Register for a specific DMA channel and brings back EDMA3 to its initial state.

This API clears the Event register, Event Miss register, Event Enable register for a specific DMA channel. It also clears the CC Error register.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	This is the channel number requested for a particular event.
evtQNum	Event Queue Number to which the channel will be unmapped (valid only for the Master Channel (DMA/QDMA) request).

Returns: none.

void EDMA3ClrCCErr	(	uint32_t	baseAddr,
		uint32_t	flags
	)

Enables the user to Clear any Channel controller Errors.

Parameters

baseAddr	Memory address of the EDMA instance used.
flags	Masks to be passed. flags can have values:

EDMA3CC_CLR_TCCERR Clears the TCCERR bit in the EDMA3CC ERR Reg
EDMA3CC_CLR_QTHRQ0 Queue threshold error clear for queue 0.
EDMA3CC_CLR_QTHRQ1 Queue threshold error clear for queue 1.

Returns: None

void EDMA3ClrEvt	(	uint32_t	baseAddr,
		uint32_t	chNum
	)

Enables the user to Clear an event.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Allocated channel number.

Returns: None

Note : This API is generally used during Manual transfers.

void EDMA3ClrIntr	(	uint32_t	baseAddr,
		uint32_t	value
	)

Enables the user to Clear an Interrupt.

Parameters

baseAddr	Memory address of the EDMA instance used.
value	Value to be set to clear the Interrupt Status.

Returns: None

void EDMA3ClrMissEvt	(	uint32_t	baseAddr,
		uint32_t	chNum
	)

Enables the user to Clear any missed event.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Allocated channel number.

Returns: None

void EDMA3Deinit	(	uint32_t	baseAddr,
		uint32_t	queNum
	)

EDMA3 Deinitialization.

This function deinitializes the EDMA3 Driver Clears the error specific registers (EMCR/EMCRh, QEMCR, CCERRCLR) & deinitialize the Queue Number Registers

Parameters

baseAddr	Memory address of the EDMA instance used.
queNum	Event Queue used

Returns: None

Note: The regionId is the shadow region(0 or 1) used and the, Event Queue used is either (0 or 1). There are only two shadow regions and only two event Queues

void EDMA3DisableChInShadowReg	(	uint32_t	baseAddr,
		uint32_t	chType,
		uint32_t	chNum
	)

Disable channel to Shadow region mapping.

This API allocates DMA/QDMA channels or TCCs, and the same resources are enabled in the shadow region specific register (DRAE/DRAEH/QRAE). Here only one shadow region is used since, there is only one Master.

Parameters

baseAddr	Memory address of the EDMA instance used.
chType	(DMA/QDMA) Channel
chNum	Allocated channel number.

chType can have values EDMA3_CHANNEL_TYPE_DMA
EDMA3_CHANNEL_TYPE_QDMA

Returns: None

void EDMA3DisableDmaEvt	(	uint32_t	baseAddr,
		uint32_t	chNum
	)

Enables the user to Disable an DMA event.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Allocated channel number.

Returns: None

Note : Writes of 1 to the bits in EECR clear the corresponding event bits in EER; writes of 0 have no effect.. This is generally used for Event Based transfers.

void EDMA3DisableEvtIntr	(	uint32_t	baseAddr,
		uint32_t	chNum
	)

Enables the user to clear CC interrupts.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Allocated channel number.

Returns: None

Note : Writes of 1 to the bits in IECR clear the corresponding interrupt bits in the interrupt enable registers (IER); writes of 0 have no effect.

void EDMA3DisableQdmaEvt	(	uint32_t	baseAddr,
		uint32_t	chNum
	)

Enables the user to disable an QDMA event.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Allocated channel number.

Returns: None

Note : Writes of 1 to the bits in QEECR clears the corresponding event bits in QEER.

uint32_t EDMA3DisableTransfer	(	uint32_t	baseAddr,
		uint32_t	chNum,
		uint32_t	trigMode
	)

Disable DMA transfer on the specified channel.

There are multiple ways by which an EDMA3 transfer could be triggered. The triggering mode option allows choosing from the available triggering modes.

To disable a channel which was previously triggered in manual mode, this API clears the Secondary Event Register and Event Miss Register, if set, for the specific DMA channel.

To disable a channel which was previously triggered in QDMA mode, this API clears the QDMA Event Enable Register, for the specific QDMA channel.

To disable a channel which was previously triggered in event mode, this API clears the Event Enable Register, Event Register, Secondary Event Register and Event Miss Register, if set, for the specific DMA channel.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Channel being used to enable transfer.
trigMode	Mode of triggering start of transfer (Manual, QDMA or Event).

Returns: retVal TRUE or FALSE depending on the param passed.

void EDMA3EnableChInShadowReg	(	uint32_t	baseAddr,
		uint32_t	chType,
		uint32_t	chNum
	)

Enable channel to Shadow region mapping.

This API allocates DMA/QDMA channels or TCCs, and the same resources are enabled in the shadow region specific register (DRAE/DRAEH/QRAE). Here only one shadow region is used since, there is only one Master.

Parameters

baseAddr	Memory address of the EDMA instance used.
chType	(DMA/QDMA) Channel For Example: For DMA it is, EDMA3_CHANNEL_TYPE_DMA.
chNum	Allocated channel number.

chType can have values EDMA3_CHANNEL_TYPE_DMA
EDMA3_CHANNEL_TYPE_QDMA

Returns: None

void EDMA3EnableDmaEvt	(	uint32_t	baseAddr,
		uint32_t	chNum
	)

Enables the user to enable an DMA event.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Allocated channel number.

Returns: None

Note : Writes of 1 to the bits in EESR sets the corresponding event bits in EER. This is generally used for Event Based transfers.

void EDMA3EnableEvtIntr	(	uint32_t	baseAddr,
		uint32_t	chNum
	)

Enables the user to enable the transfer completion interrupt generation by the EDMA3CC for all DMA/QDMA channels.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Allocated channel number.

Returns: None

Note : To set any interrupt bit in IER, a 1 must be written to the corresponding interrupt bit in the interrupt enable set register.

void EDMA3EnableQdmaEvt	(	uint32_t	baseAddr,
		uint32_t	chNum
	)

Enables the user to enable an QDMA event.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Allocated channel number.

Returns: None

Note : Writes of 1 to the bits in QEESR sets the corresponding event bits in QEER.

uint32_t EDMA3EnableTransfer	(	uint32_t	baseAddr,
		uint32_t	chNum,
		uint32_t	trigMode
	)

Start EDMA transfer on the specified channel.

There are multiple ways to trigger an EDMA3 transfer. The triggering mode option allows choosing from the available triggering modes: Event, Manual or QDMA.

In event triggered, a peripheral or an externally generated event triggers the transfer. This API clears the Event and Event Miss Register and then enables the DMA channel by writing to the EESR.

In manual triggered mode, CPU manually triggers a transfer by writing a 1 in the Event Set Register ESR. This API writes to the ESR to start the transfer.

In QDMA triggered mode, a QDMA transfer is triggered when a CPU (or other EDMA3 programmer) writes to the trigger word of the QDMA channel PaRAM set (auto-triggered) or when the EDMA3CC performs a link update on a PaRAM set that has been mapped to a QDMA channel (link triggered). This API enables the QDMA channel by writing to the QEESR register.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Channel being used to enable transfer.
trigMode	Mode of triggering start of transfer (Manual, QDMA or Event). trigMode can have values: EDMA3_TRIG_MODE_MANUAL EDMA3_TRIG_MODE_QDMA EDMA3_TRIG_MODE_EVENT

Returns: retVal TRUE or FALSE depending on the param passed.

uint32_t EDMA3ErrIntrHighStatusGet ( uint32_t baseAddr )

This returns error interrupt status for those events whose event number is greater than 32.

Parameters

baseAddr Memory address of the EDMA instance used.

Returns: value Status of the Interrupt Pending Register

uint32_t EDMA3FreeChannel	(	uint32_t	baseAddr,
		uint32_t	chType,
		uint32_t	chNum,
		uint32_t	trigMode,
		uint32_t	tccNum,
		uint32_t	evtQNum
	)

Free the specified channel (DMA/QDMA/Link) and its associated resources (PaRAM Set, TCC etc) and removes various mappings.

For Link channels, this API only frees the associated PaRAM Set.

For DMA/QDMA channels, it does the following operations: 1) Disable any ongoing transfer on the channel,
2) Remove the channel to Event Queue mapping,
3) For DMA channels, clear the DCHMAP register, if available
4) For QDMA channels, clear the QCHMAP register,
5) Frees the DMA/QDMA channel in the end.

Parameters

baseAddr	Memory address of the EDMA instance used.
chType	(DMA/QDMA) Channel For Example: For QDMA it is, EDMA3_CHANNEL_TYPE_QDMA.
chNum	This is the channel number requested for a particular event.
trigMode	Mode of triggering start of transfer.
tccNum	The channel number on which the completion/error interrupt is generated. Not used if user requested for a Link channel.
evtQNum	Event Queue Number to which the channel will be unmapped (valid only for the Master Channel (DMA/QDMA) request). trigMode can have values: EDMA3_TRIG_MODE_MANUAL EDMA3_TRIG_MODE_QDMA EDMA3_TRIG_MODE_EVENT

Returns: TRUE if parameters are valid else return FALSE

uint32_t EDMA3GetCCErrStatus ( uint32_t baseAddr )

This returns EDMA3 CC error status.

Parameters

baseAddr Memory address of the EDMA instance used.

Returns: value Status of the Interrupt Pending Register

uint32_t EDMA3GetErrIntrStatus ( uint32_t baseAddr )

This returns error interrupt status for those events whose event number is less than 32.

Parameters

baseAddr Memory address of the EDMA instance used.

Returns: value Status of the Interrupt Pending Register

uint32_t EDMA3GetIntrStatus ( uint32_t baseAddr )

This function returns interrupts status of those events which is less than 32.

Parameters

baseAddr Memory address of the EDMA instance used.

void EDMA3GetPaRAM	(	uint32_t	baseAddr,
		uint32_t	paRAMId,
		EDMA3CCPaRAMEntry *	currPaRAM
	)

Retrieve existing PaRAM set associated with specified logical channel (DMA/Link).

Parameters

baseAddr	Memory address of the EDMA instance used.
paRAMId	paRAMset ID whose parameter set is requested.
currPaRAM	User gets the existing PaRAM here.

Returns: None

void EDMA3Init	(	uint32_t	baseAddr,
		uint32_t	queNum
	)

EDMA3 Initialization.

This function initializes the EDMA3 Driver Clears the error specific registers (EMCR/EMCRh, QEMCR, CCERRCLR) & initialize the Queue Number Registers

Parameters

baseAddr	Memory address of the EDMA instance used.
queNum	Event Queue Number to which the channel will be mapped (valid only for the Master Channel (DMA/QDMA) request).

Returns: None

Note: The regionId is the shadow region(0 or 1) used and the, Event Queue used is either (0 or 1). There are only four shadow regions and only two event Queues

uint32_t EDMA3IntrStatusHighGet ( uint32_t baseAddr )

This function returns interrupts status of those events which is greater than 32.

Parameters

baseAddr Memory address of the EDMA instance used.

void EDMA3LinkChannel	(	uint32_t	baseAddr,
		uint32_t	paRAMId1,
		uint32_t	paRAMId2
	)

Link two channels.

This API is used to link two previously allocated logical (DMA/QDMA/Link) channels.

It sets the Link field of the PaRAM set associated with first channel (chId1) to point it to the PaRAM set associated with second channel (chId2).

It also sets the TCC field of PaRAM set of second channel to the same as that of the first channel.

Parameters

baseAddr	Memory address of the EDMA instance used.
paRAMId1	PaRAM set ID of physical channel1 to which particular paRAM set will be linked or PaRAM set ID in case another PaRAM set is being linked to this PaRAM set
paRAMId2	PaRAM set ID which is linked to channel with parameter ID paRAMId1

After the transfer based on the PaRAM set of channel1 is over, the PaRAM set paRAMId2 will be copied to the PaRAM set of channel1 and transfer will resume. For DMA channels, another sync event is required to initiate the transfer on the Link channel.

Returns: none.

void EDMA3MapChToEvtQ	(	uint32_t	baseAddr,
		uint32_t	chType,
		uint32_t	chNum,
		uint32_t	evtQNum
	)

Map channel to Event Queue.

This API maps DMA/QDMA channels to the Event Queue

Parameters

baseAddr	Memory address of the EDMA instance used.
chType	(DMA/QDMA) Channel For Example: For QDMA it is EDMA3_CHANNEL_TYPE_QDMA.
chNum	Allocated channel number.
evtQNum	Event Queue Number to which the channel will be mapped (valid only for the Master Channel (DMA/QDMA) request). chtype can have values EDMA3_CHANNEL_TYPE_DMA EDMA3_CHANNEL_TYPE_QDMA

Returns: None

void EDMA3MapQdmaChToPaRAM	(	uint32_t	baseAddr,
		uint32_t	chNum,
		const uint32_t *	paRAMId
	)

Enables the user to map a QDMA channel to PaRAM set This API Needs to be called before programming the paRAM sets for the QDMA Channels.Application needs to maitain the paRAMId provided by this API.This paRAMId is used to set paRAM and get paRAM. Refer corresponding API's for more details.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Allocated QDMA channel number.
paRAMId	PaRAM Id to which the QDMA channel will be mapped to. mapped to.

Returns: None

Note : The PaRAMId requested must be greater than 32(SOC_EDMA3_NUM_DMACH). and lesser than SOC_EDMA3_NUM_DMACH + chNum Because, the first 32 PaRAM's are directly mapped to first 32 DMA channels and (32 - 38) for QDMA Channels. (32 - 38) is assigned by driver in this API.

uint32_t EDMA3PeripheralIdGet ( uint32_t baseAddr )

This API return the revision Id of the peripheral.

Parameters

baseAddr Memory address of the EDMA instance used.

void EDMA3QdmaClrMissEvt	(	uint32_t	baseAddr,
		uint32_t	chNum
	)

Enables the user to Clear any QDMA missed event.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Allocated channel number.

Returns: None

uint32_t EDMA3QdmaGetErrIntrStatus ( uint32_t baseAddr )

This returns QDMA error interrupt status.

Parameters

baseAddr Memory address of the EDMA instance used.

Returns: value Status of the QDMA Interrupt Pending Register

void EDMA3QdmaGetPaRAM	(	uint32_t	baseAddr,
		uint32_t	paRAMId,
		EDMA3CCPaRAMEntry *	currPaRAM
	)

Retrieve existing PaRAM set associated with specified logical channel (QDMA).

Parameters

baseAddr	Memory address of the EDMA instance used.
paRAMId	paRAMset ID whose parameter set is requested.
currPaRAM	User gets the existing PaRAM here.

Returns: None

uint32_t EDMA3QdmaGetPaRAMEntry	(	uint32_t	baseAddr,
		uint32_t	paRAMId,
		uint32_t	paRAMEntry
	)

Get a particular PaRAM entry of the specified PaRAM set.

Parameters

baseAddr	Memory address of the EDMA instance used.
paRAMId	PaRAM Id to which the QDMA channel is mapped to.
paRAMEntry	Specify the PaRAM set entry which needs to be read.

paRAMEntry can have values:

EDMA3CC_PARAM_ENTRY_OPT EDMA3CC_PARAM_ENTRY_SRC EDMA3CC_PARAM_ENTRY_ACNT_BCNT EDMA3CC_PARAM_ENTRY_DST EDMA3CC_PARAM_ENTRY_SRC_DST_BIDX EDMA3CC_PARAM_ENTRY_LINK_BCNTRLD EDMA3CC_PARAM_ENTRY_SRC_DST_CIDX EDMA3CC_PARAM_ENTRY_CCNT

Returns: paRAMEntryVal The value of the paRAM field pointed by the paRAMEntry.

Note: This API should be used while reading the PaRAM set entry for QDMA channels. And the paRAMEntryVal is a packed value for certain fields of paRAMEntry.The user has to make sure the value is unpacked appropriately. For example, the third field is A_B_CNT. Hence he will have to unpack it to two 16 bit fields to get ACNT and BCNT.

void EDMA3QdmaSetPaRAM	(	uint32_t	baseAddr,
		uint32_t	paRAMId,
		EDMA3CCPaRAMEntry *	newPaRAM
	)

Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (QDMA only).

This API takes a PaRAM Set as input and copies it onto the actual PaRAM Set associated with the logical channel. OPT field of the PaRAM Set is written first and the CCNT field is written last.

Parameters

baseAddr	Memory address of the EDMA instance used.
paRAMId	paRaMset ID whose parameter set has to be updated
newPaRAM	Parameter RAM set to be copied onto existing PaRAM.

Returns: None

void EDMA3QdmaSetPaRAMEntry	(	uint32_t	baseAddr,
		uint32_t	paRAMId,
		uint32_t	paRAMEntry,
		uint32_t	newPaRAMEntryVal
	)

Set a particular PaRAM set entry of the specified PaRAM set.

Parameters

baseAddr	Memory address of the EDMA instance used.
paRAMId	PaRAM Id to which the QDMA channel is mapped to.
paRAMEntry	Specify the PaRAM set entry which needs to be set.
newPaRAMEntryVal	The new field setting. Make sure this field is packed for setting certain fields in paRAM.

EDMA3CC_PARAM_ENTRY_OPT EDMA3CC_PARAM_ENTRY_SRC EDMA3CC_PARAM_ENTRY_ACNT_BCNT EDMA3CC_PARAM_ENTRY_DST EDMA3CC_PARAM_ENTRY_SRC_DST_BIDX EDMA3CC_PARAM_ENTRY_LINK_BCNTRLD EDMA3CC_PARAM_ENTRY_SRC_DST_CIDX EDMA3CC_PARAM_ENTRY_CCNT

Returns: None

Note: This API should be used while setting the PaRAM set entry for QDMA channels. If EDMA3QdmaSetPaRAMEntry() used, it will trigger the QDMA channel before complete PaRAM set entry is written.

uint32_t EDMA3RequestChannel	(	uint32_t	baseAddr,
		uint32_t	chType,
		uint32_t	chNum,
		uint32_t	tccNum,
		uint32_t	evtQNum
	)

Request a DMA/QDMA/Link channel.

Each channel (DMA/QDMA/Link) must be requested before initiating a DMA transfer on that channel.

This API is used to allocate a logical channel (DMA/QDMA/Link) along with the associated resources. For DMA and QDMA channels, TCC and PaRAM Set are also allocated along with the requested channel.

User can request a specific logical channel by passing the channel number in 'chNum'.

For DMA/QDMA channels, after allocating all the EDMA3 resources, this API sets the TCC field of the OPT PaRAM Word with the allocated TCC. It also sets the event queue for the channel allocated. The event queue needs to be specified by the user.

For DMA channel, it also sets the DCHMAP register.

For QDMA channel, it sets the QCHMAP register and CCNT as trigger word and enables the QDMA channel by writing to the QEESR register.

Parameters

baseAddr	Memory address of the EDMA instance used.
chType	(DMA/QDMA) Channel For Example: For DMA it is EDMA3_CHANNEL_TYPE_DMA.
chNum	This is the channel number requested for a particular event.
tccNum	The channel number on which the completion/error interrupt is generated. Not used if user requested for a Link channel.
evtQNum	Event Queue Number to which the channel will be mapped (valid only for the Master Channel (DMA/QDMA) request).

Returns: TRUE if parameters are valid, else FALSE

void EDMA3SetEvt	(	uint32_t	baseAddr,
		uint32_t	chNum
	)

Enables the user to Set an event. This API helps user to manually set events to initiate DMA transfer requests.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	Allocated channel number.

Returns: None

Note : This API is generally used during Manual transfers.

void EDMA3SetPaRAM	(	uint32_t	baseAddr,
		uint32_t	paRAMId,
		EDMA3CCPaRAMEntry *	newPaRAM
	)

Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (DMA/Link).

This API takes a PaRAM Set as input and copies it onto the actual PaRAM Set associated with the logical channel. OPT field of the PaRAM Set is written first and the CCNT field is written last.

Parameters

baseAddr	Memory address of the EDMA instance used.
paRAMId	paRAMset ID whose parameter set has to be updated
newPaRAM	Parameter RAM set to be copied onto existing PaRAM.

Returns: None

void EDMA3SetQdmaTrigWord	(	uint32_t	baseAddr,
		uint32_t	chNum,
		uint32_t	trigWord
	)

Assign a Trigger Word to the specified QDMA channel.

This API sets the Trigger word for the specific QDMA channel in the QCHMAP Register. Default QDMA trigger word is CCNT.

Parameters

baseAddr	Memory address of the EDMA instance used.
chNum	QDMA Channel which needs to be assigned the Trigger Word
trigWord	The Trigger Word for the QDMA channel. Trigger Word is the word in the PaRAM Register Set which, when written to by CPU, will start the QDMA transfer automatically.

Returns: None

void EDMA3UnmapChToEvtQ	(	uint32_t	baseAddr,
		uint32_t	chType,
		uint32_t	chNum
	)

Remove Mapping of channel to Event Queue.

This API Unmaps DMA/QDMA channels to the Event Queue allocated

Parameters

baseAddr	Memory address of the EDMA instance used.
chType	(DMA/QDMA) Channel For Example: For DMA it is EDMA3_CHANNEL_TYPE_DMA.
chNum	Allocated channel number. chtype can have values EDMA3_CHANNEL_TYPE_DMA EDMA3_CHANNEL_TYPE_QDMA

Returns: None

void EDMAsetRegion ( uint32_t i )

This API sets the region.

Parameters

i	pass the regionId.

uint32_t EDMAVersionGet ( void )

Bug fix removed this function

Data Structures

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