TI-radar AWR1843 C674x DSP core  1
cycleLog_t_ Struct Reference

DSP cycle profiling structure to accumulate different processing times in chirp and frame processing periods. More...

#include <dss_data_path.h>

Collaboration diagram for cycleLog_t_:

Data Fields

uint32_t interChirpProcessingTime
 total processing time during all chirps in a frame excluding EDMA waiting time More...
 
uint32_t interChirpWaitTime
 total wait time for EDMA data transfer during all chirps in a frame More...
 
uint32_t interFrameProcessingTime
 total processing time for 2D and 3D excluding EDMA waiting time More...
 
uint32_t interFrameWaitTime
 total wait time for 2D and 3D EDMA data transfer More...
 

Detailed Description

DSP cycle profiling structure to accumulate different processing times in chirp and frame processing periods.

Definition at line 99 of file dss_data_path.h.

Field Documentation

◆ interChirpProcessingTime

uint32_t cycleLog_t_::interChirpProcessingTime

total processing time during all chirps in a frame excluding EDMA waiting time

Definition at line 100 of file dss_data_path.h.

◆ interChirpWaitTime

uint32_t cycleLog_t_::interChirpWaitTime

total wait time for EDMA data transfer during all chirps in a frame

Definition at line 101 of file dss_data_path.h.

Referenced by MmwDemo_processChirp().

◆ interFrameProcessingTime

uint32_t cycleLog_t_::interFrameProcessingTime

total processing time for 2D and 3D excluding EDMA waiting time

Definition at line 102 of file dss_data_path.h.

◆ interFrameWaitTime

uint32_t cycleLog_t_::interFrameWaitTime

total wait time for 2D and 3D EDMA data transfer

Definition at line 103 of file dss_data_path.h.


The documentation for this struct was generated from the following file: