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mmWaveLink Init Complete data structure for event RL_DEV_AE_MSSPOWERUPDONE_SB More...
#include <control/mmwavelink/mmwavelink.h>
Data Fields | |
rlUInt32_t | powerUpTime |
masterSS powerup time, 1LSB = 5ns | |
rlUInt64_t | powerUpStatus |
masterSS Bootup Status over SPI, 0 - PASS, 1- Fail Bit Error-description 0 certificate authentication failure 1 certificate parser failure 2 Rprc image1 authentication failure 3 Rprc image2 authentication failure 4 Rprc image3 authentication failure 5 Rprc header not found 6 Meta header not found 7 S/W anti roll back check failure 8 Efuse integrity failure 9 certificate field validity failure 10 certificate field invalid authentication key index 11 certificate field invalid hash type 12 certificate field invalid subsystem 13 certificate field invalid decrypt key index 14 certificate field check efuse mismatch 15 certificate field check 1 efuse mismatch 16 certificate field check 2 efuse mismatch 17 certificate field invalid subsystem bank allocation 18 certificate field invalid total banks allocation 19 Rprc parser file length mismatch 20 Rprc parser MSS file offset mismatch 21 Rprc parser BSS file offset mismatch 22 Rprc parser DSS file offset mismatch 23 certificate field invalid decrypt key 24 certificate field invalid authentication key 25 HS device certificate not present 26 Test port enabling failed 27 Shared memory allocation failed 28 MSS image not found 29 Meta header num files error 30 Meta header CRC failure 63:31 RESERVED | |
rlUInt64_t | bootTestStatus |
masterSS Boot Test Status, 1 - PASS, 0 - FAIL Bit Status Information 0 MibSPI self-test 1 DMA self-test 2 Watchdog self-test 3 RTI self-test 4 ESM self-test 5 EDMA self-test 6 CRC self-test 7 VIM self-test 8 MPU self-test 9 Mailbox self-test 10 LVDS pattern generation test 11 CSI2 pattern generation test 12 NERROR generation test 13 MibSPI single bit error test 14 MibSPI double bit error test 15 DMA Parity error test 16 TCMA RAM single bit error test 17 TCMB RAM single bit error test 18 TCMA RAM double bit error test 19 TCMB RAM double bit error test 20 TCMA RAM parity error test 21 TCMB RAM parity error test 22 VIM lockstep test 23 CCM R4 lockstep test 24 DMA MPU region test 25 MSS Mailbox single bit error test 26 MSS Mailbox double bit error test 27 BSS Mailbox single bit error test 28 BSS Mailbox double bit error test 29 EDMA MPU test 30 EDMA parity test 31 CSI2 parity test 32 PBIST (VIM RAM/TCM RAM/MibSPI SRAM/Mailbox/EDMA/DMA/CSI2) 33 LBIST (VIM/CR4) 63:34 RESERVED | |
mmWaveLink Init Complete data structure for event RL_DEV_AE_MSSPOWERUPDONE_SB
Definition at line 1393 of file mmwavelink.h.